Courses

Featured Courses

EE 21N What is Nanotechnology?

Time	TBD	Instructor	Prof. H.-S. Philip Wong
Location	TBD	Administrator	Fely Barrera
Website	http://eeclass.stanford.edu/ee21n
Nanotechnology is an often used word and it means many things to different people. Although those in the science and engineering world have some notion of what nanotechnology is, the perception from the society at large may be entirely different. In this course, we start with the classic paper by Richard Feynman ("There's Plenty of Room at the Bottom"), which laid down the challenge to the nanotechnologists. Then we discuss two classic books that offer a glimpse of what nanotechnology is: Engines of Creation: The Coming Era of Nanotechnology by Eric Drexler (Anchor Books 1986), and Prey by Michael Crichton (Harper Collins 2002). Drexler's thesis sparked the imagination of what nano machinery might do, whereas Crichton's popular novel channeled the public's attention to this subject by portraying a disastrous scenario of a technology gone astray. We will use the scientific knowledge to analyze the assumptions and predictions of these classic works. We will draw upon the latest research advances to illustrate the possibilities and impossibilities of nanotechnology.
Prerequisites	none

EE 218 Introduction to Nanoelectronics and Nanotechnology

Time	TBD	Instructor	Prof. H.-S. Philip Wong
Location	TBD	Administrator	Fely Barrera
Website	http://eeclass.stanford.edu/ee218
Focus is on the device physics and operation principles. Device and material options for advanced silicon FETs at the nanoscale. Topics identified by the International Technology Roadmap for Semiconductors, emerging research devices section; see http://public.itrs.net. Non-silicon-based devices such as carbon nanotubes, semiconductor nanowires, and molecular devices; and non-FET based devices such as single electron transistors (SET), resonant tunneling diodes (RTD), and quantum dots. Logic and memory devices.
Prerequisites	Undergraduate device physics

EE 316 Advanced VLSI Devices

Time	TBD	Instructor	Prof. H.-S. Philip Wong
Location	TBD	Administrator	Fely Barrera
Website	http://eeclass.stanford.edu/ee316
In modern VLSI technologies, MOS and bipolar device electrical characteristics are sensitive to structural details and therefore to fabrication techniques. How are advanced VLSI devices designed and what future changes are likely? What are the implications for device electrical performance caused by fabrication techniques? Physical models for deep submicron structures, control of electrical characteristics (threshold voltage, breakdown voltage, current gain) in small structures, and alternative device structures for VLSI.
Prerequisites	none

EE 309 Semiconductor Memory Devices and Technology

Time	TBD	Instructor	Prof. H.-S. Philip Wong
Location	TBD	Administrator	Fely Barrera
Website	http://eeclass.stanford.edu/ee309
This course introduces the student to various memory devices - SRAM, DRAM, NVRAM (non-volatile memory). The functionality and performance of ULSI systems are increasingly dependent upon the characteristics of the memory subsystem. This course will cover various aspects of semiconductor memories, including basic operation principles, device design considerations, device scaling, device fabrication, addressing and readout circuits. Various cell structures (1T-1C, 6T, 4T, 1T-1R, 0T-1R, floating gate FLASH, SONOS, NROM), and memory organization (open bit-line, folded bit-line, NAND, NOR, cross-point etc.). This course will end with a survey of new memory concepts (e.g. nanocrystal memory, single-electron memory, magnetic tunnel junction memory (MRAM), ferroelectric memory (FRAM), phase change memory (PRAM), T-RAM, polymer memory). This course will be based mostly on course notes and recent published papers. Potential reference texts may include: C. Hu, "Nonvolatile semiconductor memories," IEEE Press (1991), B. Prince, "Semiconductor memories," Wiley (1995). W.D. Brown and J.E. Brewer eds. "Nonvolatile semiconductor technology: a comprehensive guide to understanding and using NVSM devices," IEEE Press (1997), K. Itoh, "VLSI memory chip design," Springer (2001).
Prerequisites	none

EE 310 Integrated Circuits Technology and Design Seminar

Time	TBD	Instructor	Prof. H.-S. Philip Wong
Location	TBD	Administrator	Fely Barrera
Website	http://eeclass.stanford.edu/ee310
Integrated Circuits Technology and Design Seminar
Prerequisites	none

EE 392B Image Sensors

Time	TBD	Instructor	Prof. Abbas El Gamal, Prof. H.-S. Philip Wong
Location	TBD	Administrator	Fely Barrera
Website	http://eeclass.stanford.edu/ee392b
The course provides an introduction to the design and analysis of image sensors. Topics include: silicon photodetectors; spectral response and dark current; device fabrication technologies including color filters and microlens; CCD and CMOS passive and active pixel sensor architectures and circuits; nonidealities including temporal noise, Fixed Pattern Noise (FPN), smear, and lag; performance metrics including quantum efficiency, conversion gain, SNR, dynamic range, and MTF; pixel optics; spatial resolution. The course will also review recent research results and trends including architectures for high dynamic range imaging and effects of technology scaling. The course is intended for graduate students with interest in image system engineering, solid state devices, photonics, and circuits.
Prerequisites	Undergraduate level device, circuit, and system background, e.g., equivalent to EE 101A,B and 102A and B, and 116.

Course Categories