Models

Stanford University CNFET Model

Download Model
v2.2.1 [Recommended]
<Stanford CNFET Model Package v221 (HSPICE).zip>
Linux/Solaris | 5.9 MB
Download Model
v2.1.1 (HSPICE)
<Stanford CNFET Model Package v211 (HSPICE).zip>
Linux/Solaris | 5.3 MB
Download Model
v2.1.1 (VerilogA)
<Stanford CNFET Model Package v211.zip>
Linux/Solaris | 5.3 MB

NEWS: Model Update Version 2.2.1

The update improves the accuracy of the model. In particular, the accuracy of the pCNFET has been improved and the results now show symmetry between n- and p-type devices. Also, a bug caused some very slight current dependence on the absolute voltages used. In most situations, the above bug in v2.1.1 will have little impact on the results, however, under certain bias conditions, the error may become large. This is all fixed in the new release v2.2.1.

*****************************************************************************************************************

The Stanford University CNFET Model is a circuit-compatible, compact model which describes enhancement-mode, CMOS-like CNFETs. It accounts for several practical non-idealities, such as scattering, effects of the source/drain extension region, and inter-CNT charge screening effects. In addition, by including a full transcapacitance network, it also produces better predictions of the dynamic performance and transient response. Available in either VerilogA or HSPICE.

Note: VerilogA is the recommended Model Package for Version 2.1.1. For Version 2.2.1, the VerilogA package is not yet available.
If you do not have support for VerilogA, or the VerilogA Model Package does not work on your computing systems, then please try the HSPICE Model Package.

Contact	Albert Lin [mrlin@stanford.edu]
Contributor	Jie Deng, Albert Lin, Gordon Wan
References	J. Deng, H.-S. P. Wong, “Modeling and Analysis of Planar Gate Capacitance for 1-D FET with Multiple Cylindrical Conducting Channels,” IEEE Trans. Electron Devices, vol. 54, pp. 2377-2385, 2007. J. Deng, H.-S. P. Wong, “A Compact SPICE Model for Carbon-Nanotube Field-Effect Transistors Including Nonidealities and Its Application - Part I: Model of the Intrinsic Channel Region,” IEEE Trans. Electron Devices, vol 54, pp. 3186-3194, 2007. J. Deng, H.-S. P. Wong, “A Compact SPICE Model for Carbon-Nanotube Field-Effect Transistors Including Nonidealities and Its Application - Part II: Full Device Model and Circuit Performance Benchmarking,” IEEE Trans. Electron Devices, vol. 54, pp. 3195-3205, 2007.
Category	Carbon Nanotubes