Models

Stanford University CNFET Model

NEW VERSION V2.1.1 UPDATED 02/02/2008!!!

[Bug in previous versions: In HSPICE v2.0.1, the code incorrectly calculates the CNFET threshold voltage and current dependence on the substrate bias for both n- and p-CNFETs. This problem has been fixed in Version 2.1.1. Both n- and p-CNFETs should have CNFET substrate connected to the same voltage as the CNFET source if no threshold shift is desired. The substrate can be connected to other voltages to obtain threshold shifts. The dependence of the threshold on the substrate bias is now correctly calculated.]

The Stanford University CNFET Model is a circuit-compatible, compact model which describes enhancement-mode, CMOS-like CNFETs. It accounts for several practical non-idealities, such as scattering, effects of the source/drain extension region, and inter-CNT charge screening effects. In addition, by including a full transcapacitance network, it also produces better predictions of the dynamic performance and transient response. Available in either VerilogA or HSPICE.

Note: VerilogA is the recommended Model Package.
If you do not have support for VerilogA, or the VerilogA Model Package does not work on your computing systems, then please try the HSPICE Model Package.

Schottky Barrier CNFET model

Ballistic Carbon Nanotube Field Effect Transistor with Schottky barriers.
Model is accessible through the Nanohub:

https://www.nanohub.org/tools/sbcnfet/