Our group sought better control of carbon nanotube transistors by using a thinner insulator between the nanotube [faint circle, center] and the transistor gate [top, black].

This work appears at 2020 IEDM. An IEEE spectrum article describing the work can be found below.

https://spectrum.ieee.org/nanoclast/semiconductors/devices/scaleddown-ca...

G. Pitner, Z. Zhang, Q. Lin, S.-K Su, C. Gilardi, C. Kuo, H. Kashyap, T. Weiss, Z. Yu, T.-A. Chao, L.-J. Li, S. Mitra, H.-S. P. Wong, J. Cai, A. Kummel, P. Bandaru and M. Passlack, "Sub-0.5 nm Interfacial Dielectric Enables Superior Electrostatics: 65 mV/dec Top-Gated Carbon Nanotube FETs at 15 nm Gate Length," International Electron Devices Meeting (IEDM), Dec. 2020.

Last modified Tue, 15 Dec, 2020 at 21:42